FPGA Implementation of An Event-driven Saliency-based Selective Attention Model

Artificial vision systems of autonomous agents face very difficult challenges, as their vision sensors are required to transmit vast amounts of information to the processing stages, and to process it in real-time. One first approach to reduce data transmission is to use event-based vision sensors, whose pixels produce events only when there are changes in the input. However, even for event-based vision, transmission and processing of visual data can be quite onerous. Currently, these challenges are solved by using high-speed communication links and powerful machine vision processing hardware. But if resources are limited, instead of processing all the sensory information in parallel, an effective strategy is to divide the visual field into several small sub-regions, choose the region of highest saliency, process it, and shift serially the focus of attention to regions of decreasing saliency. This strategy, commonly used also by the visual system of many animals, is typically referred to as ``selective attention''. Here we present a digital architecture implementing a saliency-based selective visual attention model for processing asynchronous event-based sensory information received from a DVS. For ease of prototyping, we use a standard digital design flow and map the architecture on an FPGA. We describe the architecture block diagram highlighting the efficient use of the available hardware resources demonstrated through experimental results exploiting a hardware setup where the FPGA interfaced with the DVS camera.Comment: 5 pages, 5 figure

A training course on basic gynecological clinical skills and its effect on medical student’s performance in Guilan University of Medical Sciences

Introduction: Pursuing the purpose of promoting students’ potentials for learning practical skills, medical universities have tried to create a suitable environment in clinical skills centers for the practice of medicine in a simulated environment to prevent possible mistakes in real-life situations. This study aims to determine the effect of basic gynecological clinical skills on students’ performance in Guilan University of Medical Sciences. Methods: This quasi-experimental study with a single before-and-after-training group conducted in April 2009 in the Clinical Skills Center of Guilan University of Medical Sciences. Through census sampling 25 clerckship students taking the basic gynecological clinical skills course were studied. Data collection was done through 8 researcher-built checklists. Their validity and reliability were confirmed .Descriptive (mean and standard deviation) and inferential (paired t-test) statistics were applied for data analysis using SPSS. Results: There was a significant difference between the students’ performance on basic gynecological clinical skills before and after training the mean of the students’ total scores on all eight skills showed a significant increase after the training course. The highest mean scores before the training belonged to pop smear sampling skill(7.12w±2.42) and IUD insertion skill (5.8±2.41),while the lowest belonged to the management of third stage of labor skill(1.33±0.57) and bimanual examination skill (1.8±0.18). Skills which showed the highest mean scores after the training were IUD Insertion skill (13.52 ± 1.29) and Pap smear sampling skill(12± 1.08). Conclusion:Before the skills training, the students’ mean scores on most procedures were not satisfactory, but after the training course, they increased significantly. Therefore, it is suggested that clinical skills centers and objective assessment methods be used both to meet students’ needs and preserve patients’ rights

A Digital Multiplier-less Neuromorphic Model for Learning a Context-Dependent Task

Highly efficient performance-resources trade-off of the biological brain is a motivation for research on neuromorphic computing. Neuromorphic engineers develop event-based spiking neural networks (SNNs) in hardware. Learning in SNNs is a challenging topic of current research. Reinforcement learning (RL) is a particularly promising learning paradigm, important for developing autonomous agents. In this paper, we propose a digital multiplier-less hardware implementation of an SNN with RL capability. The network is able to learn stimulus-response associations in a context-dependent learning task. Validated in a robotic experiment, the proposed model replicates the behavior in animal experiments and the respective computational model

Digital multiplier‐less implementation of high‐precision SDSP and synaptic strength‐based STDP

Spiking neural networks (SNNs) can achieve lower latency and higher efficiency compared with traditional neural networks if they are implemented in dedicated neuromorphic hardware. In both biological and artificial spiking neuronal systems, synaptic modifications are the main mechanism for learning. Plastic synapses are thus the core component of neuromorphic hardware with on‐chip learning capability. Recently, several research groups have designed hardware architectures for modeling plasticity in SNNs for various applications. Following these research efforts, this paper proposes multiplier‐less digital neuromorphic circuits for two plasticity learning rules: the spike‐driven synaptic plasticity (SDSP) and synaptic strength–based spike timing–dependent plasticity (SSSTDP). The proposed architectures have increased the precision of the plastic synaptic weights and are suitable for spiking neural network architectures with more precise calculations. The proposed models are validated in MATLAB simulations and physical implementations on a field‐programmable gate array (FPGA)

Digital Multiplier-Less Spiking Neural Network Architecture of Reinforcement Learning in a Context-Dependent Task

Neuromorphic engineers develop event-based spiking neural networks (SNNs) in hardware. These SNNs closer resemble the dynamics of biological neurons than conventional artificial neural networks and achieve higher efficiency thanks to the event-based, asynchronous nature of the processing. Learning in the hardware SNNs is a more challenging task, however. The conventional supervised learning methods cannot be directly applied to SNNs due to the non-differentiable event-based nature of their activation. For this reason, learning in SNNs is currently an active research topic. Reinforcement learning (RL) is a particularly promising learning method for neuromorphic implementation, especially in the field of autonomous agents' control. An SNN realization of a bio-inspired RL model is in the focus of this work. In particular, in this article, we propose a new digital multiplier-less hardware implementation of an SNN with RL capability. We show how the proposed network can learn stimulus-response associations in a context-dependent task. The task is inspired by biological experiments that study RL in animals. The architecture is described using the standard digital design flow and uses power- and space-efficient cores. The proposed hardware SNN model is compared both to data from animal experiments and to a computational model. We perform a comparison to the behavioral experiments using a robot, to show the learning capability in hardware in a closed sensory-motor loop

Low-Energy and Fast Spiking Neural Network For Context-Dependent Learning on FPGA

Supervised, unsupervised, and reinforcement learning (RL) mechanisms are known as the most powerful learning paradigms empowering neuromorphic systems. These systems typically take advantage of unsupervised learning because they can learn the distribution of sensory information. However, to perform a task, not only is it important to have sensory information, but also it is required to have information about the context in which the system is operating. In this sense, reinforcement learning is very powerful for interacting with the environment while performing a context-dependent task. The predominant motivation for this brief is to present a digital architecture for a spiking neural network (SNN) model with RL capability suitable for learning a context-dependent task. The proposed architecture is composed of hardware-friendly leaky integrate-and-firing (LIF) neurons and spike timing dependent plasticity (STDP)-based synapses implemented on a field programmable gate array (FPGA). Hardware synthesis and physical implementations show that the resulting circuits can faithfully reproduce the outcome of a learning task previously performed in both animal experimentation and computational modelings. Compared to the state-of-the-art neuromorphic FPGA circuits with context-dependent learning capability, our circuit fires 10.7 times fewer spikes, which accelerates learning 15 times, while requiring 16 times less energy. This is a significant step in achieving fast and low-energy SNNs with context-dependent learning ability on FPGAs

Low-energy and fast spiking neural network for context-dependent learning on FPGA

Supervised, unsupervised, and reinforcement learning (RL) mechanisms are known as the most powerful learning paradigms empowering neuromorphic systems. These systems typically take advantage of unsupervised learning because they can learn the distribution of sensory information. However, to perform a task, not only is it important to have sensory information, but also it is required to have information about the context in which the system is operating. In this sense, reinforcement learning is very powerful for interacting with the environment while performing a context-dependent task. The predominant motivation for this research is to present a digital architecture for a spiking neural network (SNN) model with RL capability suitable for learning a context-dependent task. The proposed architecture is composed of hardware-friendly leaky integrate-and-firing (LIF) neurons and spike timing dependent plasticity (STDP)-based synapses implemented on a field programmable gate array (FPGA). Hardware synthesis and physical implementations show that the resulting circuits can faithfully reproduce the outcome of a learning task previously performed in both animal experimentation and computational modelings. Compared to the state-of-the-art neuromorphic FPGA circuits with context-dependent learning capability, our circuit fires 10.7 times fewer spikes, which accelerates learning 15 times, while requiring 16 times less energy. This is a significant step in achieving fast and low-energy SNNs with context-dependent learning ability on FPGAs